SEMI Announces Five New Technical Standards


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SEMI Announces Five New Technical Standards

New Specifications Address Cycle Time Reduction, Counterfeit Prevention

SAN JOSE, Calif. – October 6, 2008 – SEMI has published five new technical standards applicable to the semiconductor manufacturing industry. The new standards, developed by technical experts from equipment and materials suppliers, device manufacturers and other companies participating in the SEMI International Standards Program, are available for purchase in CD-ROM format or can be downloaded from the SEMI website, www.semi.org.

SEMI Standards are published three times a year. The new standards, part of the November 2008 publication cycle, join more than 775 standards that have been published by SEMI during the past 35 years.

“These new SEMI standards, which include specifications to address counterfeiting of products in the semiconductor manufacturing supply chain, are the result of collaborative, consensus-driven efforts among industry experts,” said James Amano, Director, SEMI International Standards. “Their implementation will help manage the ever increasing manufacturing challenges, improve yield and ensure compatibility of equipment and processes worldwide.”

The full list of SEMI standards being released include:

SEMI E139.3

XML/SOAP Binding for Recipe and Parameter Management

SEMI G87

Specification for Plastic Tape Frame for 300 mm Wafer

SEMI M73

Test Methods for Extracting Relevant Characteristics from Measured Wafer Edge Profiles

SEMI M74

Specification for 450 mm Diameter Mechanical Handling Polished Wafers

SEMI T20

System Architecture for Preventing/Detecting Semiconductor Counterfeit Products

The SEMI Standards Program, established in 1973, covers all aspects of semiconductor process equipment and materials, from wafer manufacturing to test, assembly and packaging, in addition to the manufacture of flat panel displays, photovoltaic systems and micro-electromechanical systems (MEMS). About 1,650 volunteers worldwide participate in the program, which is made up of 18 global technical committees. Visit www.semi.org/standards for further details about SEMI Standards.

About SEMI:

SEMI is the global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. SEMI member companies are the engine of the future, enabling smarter, faster and more economical products that improve our lives. Since 1970, SEMI has been committed to helping members grow more profitably, create new markets and meet common industry challenges. SEMI maintains offices in Austin, Beijing, Brussels, Hsinchu, Moscow, San Jose, Seoul, Shanghai, Singapore, Tokyo, and Washington, D.C. For more information, visit www.semi.org

Association Contact:

Scott Smith/SEMI
Tel: 408.943.7957
Email: ssmith@semi.org

Editor’s Note: Following is detailed information about the new SEMI standards.

SEMI E139.3

XML/SOAP Binding for Recipe and Parameter Management

The SEMI E139 Recipe and Parameter Management (RaP) specification defines support for sophisticated recipe management in semiconductor factories. The newly approved SEMI E139.3 SOAP Binding for Recipe and Parameter Management standard adds support for XML/SOAP communications. This interface is similar to that used for so-called “Interface A” data collection (see SEMI E134).

Now complete, this RaP standard brings value to the industry in several ways. It ensures the integrity of downloaded recipes, virtually eliminating scrap/rework caused by unmanaged recipe changes. This removes the need for the cycle time delays of the “download every time” approach often used today for recipes. RaP also supports process control projects by placing the power to define runtime recipe parameters in the hands of the user.

The XML/SOAP interface allows recipe transfer to be removed from the increasingly overloaded SECS communication link. Recipes are large files that can block time-sensitive command and control messaging when transferred using the SECS link. The web technology used in the new E139.3 protocol mapping is also well-suited to off-tool recipe editors. Such recipe editors can be linked quickly and easily to the equipment or to the factory recipe management system using this specification.

SEMI G87

Specification for Plastic Tape Frame for 300 mm Wafer

SEMI G87 is applicable to the processes between dicing and die bonding, including the transportation of wafers.

Currently there are several mechanical specifications for plastic tape frames in the market and semiconductor equipment manufactures design their tools according to these specifications. Providing this new mechanical and quality specification will make it easier to design equipment and eliminate the risk that a plastic tape frame with poor quality is introduced on the market.

The SEMI G87 standard eliminates remodeling costs and special options for dicers and die bonding machines. It helps reduce production loss resulting from equipment failures in the semiconductor manufacturing plant and lowers evaluation costs when the tape frame is introduced. In particular, the standard will be beneficial to the development of the following materials, tools and systems: Wafer tape for plastic tape frame; light weight dicing cassette; and process management and traceability management systems utilizing RF-ID.

SEMI M73

Test Methods for Extracting Relevant Characteristics from Measured Wafer Edge Profiles

The SEMI M73 standard defines test methods for evaluating specified wafer profiles. It offers more precise evaluation than the previous edition of SEMI M1, the polished wafer specification.

SEMI M73 provides tests for more precisely specified wafer profiles that are required for advanced device processing. SEMI M73 standardizes the description and testing of advanced silicon wafers, thus providing the industry with widely acceptable terms and methodology and making it unnecessary to develop such items on a company by company basis.

SEMI M74

Specification for 450 mm Diameter Mechanical Handling Polished Wafers

The SEMI M74 standard relates to wafer transport and handling for IC manufacturing and is intended to support R&D for design investigation of wafer carriers, load ports, AMHS, and robotics for early 450mm equipment development.

Wafer size scaling, and especially the expected gravitational sag, provides challenges for robotics, wafer carriers and shippers, and equipment wafer support. Wafer specifications enable the suppliers to model and test their designs without the need for multiple iterations based on multiple dimension changes.

SEMI T20

System Architecture for Preventing/Detecting Semiconductor Counterfeit Products

SEMI T20 provides a solution to the appearance of counterfeit products in the supply chain and is applicable to all semiconductor manufacturing products.

This standard will provide cost savings and overall economic benefits by providing a mechanism for authenticating product. It will reduce or eliminate the application of counterfeit products, thus saving wasted dollars in failed equipment that may result if counterfeit product were used.