Logic Scaling Beyond 10nm
Driven by exploding demands for faster data processing, larger storage, and expanding communication in the next few decades, advanced CMOS design and process technologies will be relied upon to deliver the enabling solution. The demands of growing multi-media data traffic have put heavy demands on the network, storage, and compute centers. At the core level of the infrastructure, heat dissipation of high-performance server processor chips is a key limiter. Smart mobile devices like tablets and smart phones form the new connectivity fabric around the cloud computing infrastructure, as they replace desktop and laptop computers as the more prolific user-interface. However, the balance of power and performance is constrained by the battery’s limitations and the need for small form-factor in these devices. Different from the past 40 years of Moore’s law scaling, the emerging smart mobile device applications are re-shaping the technology trends, putting ever more focus on power-efficiency and cost. The new emphasis stimulates innovative co-operation between process and design to deliver an effective system solution. In this presentation, we will review some of these new process technologies on the research horizon, the key considerations of process costs, and how design technology can help us attain the right solution.