Throughout the current millennium, System-on-Chip (SoC) has been the gold standard for optimizing performance and cost of complete electronic systems. By incorporating practically all the phone’s digital plus analog capabilities onto a single, giant chip, the mobile phone processor serves as a near-perfect exemplar of SoC. But today’s leading integrated circuits (IC) are pushing up against the upper limit of a chip’s size which is limited by the manufacturing equipment’s optical reticle size. This has proven difficult to increase and has grown only slowly over the years. Yet market pressure continues unabated for bigger, more capable electronic systems with more integrated memory, more digital logic, and more analog/mixed signal circuitry.
An emerging solution to this tension is 3D and 2.5D multi-die chip assemblies – often referred to as 3D-IC. The key technology breakthrough of 3D-IC is that it makes it possible to spread a system out over multiple, smaller chips that are then assembled close together and interconnected with high-speed, low-power interconnect technologies. By abandoning the need to integrate an entire system on a single SoC and instead allowing it to be disaggregated over multiple chips, 3D-IC enables Moore’s Law to break through the reticle size barrier, improves yield by shrinking the size of individual chips, and makes it possible to mix different process technologies optimized for each function.
The Four Engines Driving Semiconductor Design
The road forward is not without its challenges, however, and we are seeing design companies making significant efforts to adapt and come to grips with the following four technology and market drivers:
- The requirement for concurrent multiphysics analysis to ensure reliable and efficient electronic systems
- The blurring of the lines between silicon and system
- The need for open and inclusive multiphysics platforms that interoperate with the multitude of design platforms
- The need for, and value of, bespoke silicon for hyperscalers and system companies
Blurring of Silicon and System Design
The advent of 3D-IC opens up new horizons for solutions that can be implemented in silicon. But it also forces a closer integration between two distinct technology markets that have co-existed symbiotically for many decades: IC design and printed circuit board (PCB) design. These markets use different tools, different data formats, different manufacturing back-ends, operate at different computational and geometric scales, and focus on different physical concerns. Yet, 3D-ICs share many aspects of both markets: They include monolithic chips but also board-like substrates to stitch the chips together. And in between the two disciplines is packaging, a completely different domain that is requiring companies to re-imagine their design capabilities and flows, as well as their organizational structure.
Open, Extensible Multiphysics Platforms
The siloed isolation of chip design from PCB design and package design means that each of these markets has developed insular data structures that are ill-suited to deal with the breadth of multiphysics analysis for 3D-IC design. Many different physical disciplines, including computational fluid dynamics, mechanical stress, and electromagnetic radiation, all need to work together based on open and extensible multiphysics platforms. These platforms must embrace the modern cloud compute paradigm and enable an ecosystem by allowing individual design platforms to connect for comprehensive multiphysics analysis.
Bespoke Chips
Today’s market-leading companies are heavily dependent on technology for their continued success and market differentiation. Everybody from online retailers to telecommunications to social networking companies and hyperscalers are moving away from off-the-shelf solutions and turning to custom-built silicon to give them an edge. Many of these companies are seeking to gain market share by leveraging proprietary AI/ML algorithms trained on their extensive troves of market data – but this requires huge amounts of compute power and specialized chips. Access to high-quality silicon solutions is vital in today’s world and the demand is for continually more complex and powerful electronics.
3D-IC an Inflection Point in Electronic Design
To be sure, 3D-IC design is at an inflection point in electronic design and presents major challenges that are realigning the electronic design industry around this new reality.
For more insights on this topic from a semiconductor industry leader, please view the Keynote Address 2.5D and 3D – The Road Ahead by Vicki Mitchell, VP Engineering, Arm Central Engineering Systems Group presented at the latest Ansys IDEAS Forum. And for an EDA perspective, please view Successful 2.5D and 3D Multi-die Silicon System Design Using Synopsys’ 3DIC Compiler and Ansys’ Multiphysics Analysis from Synopsys SNUG World 2021.
About John Lee
John Lee is general manager and vice president of the Ansys Electronics and Semiconductor Business Unit. Lee co-founded and served as CEO of Gear Design Solutions (now Ansys), developer of the first purpose-built big data platform for integrated circuit design. He cofounded two other startups (Mojave Design and Performance Signal Integrity), which successfully exited into companies now part of Synopsys. He holds undergraduate and graduate degrees from Carnegie Mellon University.