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Improving Chip Design and Verification Efficiency with IC Manage

ESD Alliance member company IC Manage enables global teams to efficiently collaborate during design and verification of systems and chips. IC Manage provides design data and IP management, data analytics, hybrid cloud bursting and high-performance computing software to systems and chip companies.

Focusing on Team and Culture With John Lee of Ansys

Cultivating trust and keeping his team agile and innovative as they engage with technology partners and customers is a core focus of John Lee, General Manager and Vice President of the Ansys Electronics, Semiconductors, and Optics Business Unit.

D2S CEO Aki Fujimura: Curvy Design’s Time Has Come

Aki Fujimura, CEO of D2S and a member of the ESD Alliance Governing Council, is an expert on curvilinear (aka curvy) chip design. He believes curvy chip designs will replace the traditional Manhattan routing methods, leading to smaller, faster and more power efficient devices.

Growing Into a Management Role: Perspectives From Real Intent CEO Prakash Narain

Prakash Narain, CEO of Real Intent, describes how his thirst to build a company led to the founding of Real Intent 25 years ago. He also offers advice on how to move into management or entrepreneurism and we conclude our talk with his opinion of recent industry trends.

Wall Street’s Current View of EDA Industry With Jay Vleeschhouwer of Griffin Securities

The EDA industry has accelerated and growth has moved into double digits for the last number of years. Our forecast for 2023 is that we'll have another double-digit growth year to about $13 billion from more than $11.5 billion in total industry revenue last year.

Looking Forward to the New Chip Cycle With Needham & Company’s Charles Shi

I recently spoke with Shi about his talk Looking Forward to the New Chip Cycle during the opening of the 2023 Design Automation Conference, collocated in July with SEMICON West in San Francisco.

It Will Take a Village to Solve Multiphysics

As an industry, we must collaborate because it’s going to take a village to solve Multiphysics, which in turn is the key to growth in 3D IC. No individual company can compete on every front.

Applying AI in Fab Technology Co-Optimization

Babak A. Taheri, Ph.D., the CEO of Silvaco, about the challenges of tuning and optimizing semiconductor manufacturing processes and how AI might be applied to reduce time and costs. Silvaco is a member of the ESD Alliance, a SEMI Technology Community.

Speeding the Path to Industry Standardization with Accellera

Accellera Systems Initiative is a standards organization well-regarded by the EDA ecosystem that’s also served by the ESD Alliance, a SEMI Technology Community. Lu Dai, Senior Director of Technical Standards at Qualcomm, has chaired the Accellera Board of Directors since 2017.

Challenges and Opportunities in Intelligent System Design – Insights from Cadence

SEMI spoke with Rebecca Dobson, Corporate Vice President EMEA at Cadence Design Systems, about semiconductor industry growth drivers and why semiconductor design is crucial to meeting device scaling challenges today and beyond.