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Looking Forward to the New Chip Cycle With Needham & Company’s Charles Shi

I recently spoke with Shi about his talk Looking Forward to the New Chip Cycle during the opening of the 2023 Design Automation Conference, collocated in July with SEMICON West in San Francisco.

Needham & Company Senior Analyst Charles Shi on EDA Powering Through Semiconductor Industry Cycles

Charles Shi, Principal, Senior Analyst, Needham & Company, LLC., recently offered an upbeat assessment of the electronic design automation (EDA), silicon intellectual property (IP) and services industries, or what SEMI refers to as the electronic system design (ESD) ecosystem.

Excellicon – Managing Critical Timing Constraints Across Design and Verification to Reduce Timing and Signal Integrity Issues

Rick Eram, Excellicon’s VP of sales and operations, discusses ways for designers to compare the physical floorplan against the actual register transfer level (RTL) code and constraints, chip design trends and complexity, and a few of his predictions for the design and verification market.

Electrostatic Energy Drives Higher Power-Efficiency and Performance in Chip Design

Azeez Bhavnagarwala, Metis’ founder and CEO, speaks about advanced CMOS Memory and Arithmetic component intellectual property (IP) to improve energy efficiency and performance of processors.

Open Source EDA, IP, Cloud-Based Design, Extending Moore’s Law: Pedestal Research’s Laurie Balch Talks Chip Design Trends

As a leading analyst covering the electronic system design segment, Laurie Balch is well steeped in identifying and analyzing technology trends and forecasting new market opportunities. Laurie is now President and Research Director at Pedestal Research.

From Fledgling Business to the Core of Chips: CAST Bears Witness to Silicon IP Market Maturation

In the early 1990s, engineers of varying degrees of skill with a powerful PC set up shop designing and selling blocks or libraries of reusable components with a defined interface and behavior. These blocks, known as intellectual property, or IP, were then (and still are) integrated into a larger...

Breaking Down Chip Design Functional Verification with Breker’s Adnan Hamid

Adnan Hamid, CEO, founder and visionary of Breker Verification Systems, an ESD Alliance member based in San Jose, Calif., once described his job in chip design verification at AMD as “breaking things.” When it came to naming his startup, Breaker was a natural choice. After some consideration, the...

Taking Atoms to Systems in Next-Generation SoC Designs

New system-on-chip (SoC) devices are driving new memory architectures and photonic interfaces, while specialized new intellectual property (IP) requires analysis down to the nanometer and atomic levels because of single nanometer process nodes. According to Babak Taheri, CTO and EVP of products at...