John Lee, general manager and vice president of Ansys and a member of the ESD Alliance Governing Council, is on a quest to promote industry collaboration to solve many of the multiphysics challenges. When we talked recently, he reinforced his advocacy of open extensible platforms as a workable model for the industry. Ansys is a member of the Electronic System Design Alliance, a SEMI Technology Community.
Smith: It’s been over a year since we talked about 3D IC and bespoke silicon. Are you still seeing them as major trends? Are they changing, accelerating, slowing down or are they here to stay?
Lee: The forecast for 3D IC continues to accelerate. In fact, we expect to see a 3X increase in the number of 3D IC design starts this year over last. It started initially in areas like high-performance compute with AMD and Intel pioneering it. We now see many other markets outside of AI/ML, CPU, GPU and mobile applications. Even the more traditional manufacturers are doing 3D IC designs.
From a foundry standpoint, TSMC has been talking about CoWoS for 10 years. We see the largest number of 2.5D and 3D IC tape-outs going through TSMC, but now Samsung and Intel are starting programs that will be a big service to the industry. 3D IC is here to stay and brings challenges that need to be solved.
One-and-done bespoke silicon certainly is here. At this point the majority of companies that planned on entering the 3D IC space already have. Hyperscalers – most famously Google with its TPU and Amazon with Graviton 2 and others – have jumped in and continue to be aggressive and are building more programs. The automotive market is another area where we see bespoke silicon.
Some patterns are emerging. Tesla is developing its own silicon. However, we see other automotive companies outsourcing and not taking on the whole project themselves. Carmakers might outsource the backend design through a high-end ASIC provider like Broadcom or Marvell.
Smith: The trend is to focus on what you know and what you're good at and let somebody else venture off into the new challenges?
Lee: That's right. The evolution, even for the likes of Google, is to get started and then amass enough talent and experience to build your own silicon. Some auto companies will do their own front- or back-end. At this point, the evolution of how much they outsource versus how much they insource and the number of bespoke silicon design starts is settling down.
3D IC is exploding because of the need to continually scale. Scaling via bespoke silicon is extremely expensive. After all, there are millions of automobiles or millions of computers in data centers. This low-hanging fruit has been identified and there might be a bit of rebound back into programmable silicon systems delivered by AMD or Intel through their Altera and Xilinx acquisitions. There’s probably some room for hard-coded silicon, but general-purpose programmable gets you 95% of the way to where you want to go.
Chiplets open a new form of bespoke silicon and ties back into 3D IC. Rather than developing your own RFIC module or GPU with standardization, you can use chiplets and 3D IC.
Smith: Is the role of foundries changing as a result of 3D ICs? What are the changes and what do they need to do?
Lee: Yes. The roles are changing at the foundries and semiconductor companies. Silicon and systems are converging. Traditionally, you could design silicon, manufacture it at a fab like TSMC and then ship it to other companies for the packaging and assembly.
But if you require higher performance, tighter thermal tolerances, and protection against electromagnetic interference, you really need to analyze and build the whole system together, including the packaging. This is exemplified by 3D IC or advanced multi-die packaging that uses a silicon interposer. You need to be careful about how this gets assembled into the package and that's where foundries are stepping up with advanced packaging teams. They are developing in-house expertise in advanced electromagnetics, signal integrity, thermal and mechanical analysis as well as the use of core EDA products.
Smith: You are saying foundries are becoming part of the design team?
Lee: Absolutely. A disaggregation created pure-play fabs like TSMC. Now, there's some reaggregation going on as foundries need to ensure the success of their customers’ silicon and the packaged system. It’s not good for the foundry if the packaged system comes back and it’s not performing due to issues such as the lack of multi-die thermal or thermal mechanical analysis or a yield issue related to micro bumping and thermal stress. The foundries are extending their services from basic manufacturing to include expertise related to multiphysics and new methods.
Bob Smith: How does a collaboration between chip designers, packaging experts and manufacturing ultimately benefit the semiconductor industry?
Lee: Let me first address two other challenges to help answer this question. From a physics standpoint, multiscale is another challenge and it is extremely computationally intensive. Advanced methods related to AI/ML must accurately model high performance and encrypt it securely in the IP. If you're supplying a block of IP, you don't want the user to know the secret sauce of the internal design. But, if the IP is going into an automotive system that needs to pass electromagnetic interference and compliance checks, the user needs to know something about the IP’s performance.
Multiphysics is another huge challenge. Most of us are traditional IC engineers and were taught synthesis, place and route and timing. 3D IC and other packaging techniques are presenting us with a challenging new world. For example, when considering multiphysics, you can't look just at power consumption and be comfortable that if the power is under budget that you won’t have other issues. Power begets thermals and thermals are important. Then thermal begets mechanical effects. Physics is circular mechanical, thermal or electrical back to mechanical, thermal, mechanical. No one company can solve all these problems.
An even broader problem in design and packaging is the need for partnerships to provide open and extensible platforms. That's what happened in the manufacturing equipment industry. Individual companies have focused on developing specific equipment for various manufacturing steps but are also collaborating so that these platforms can interchange data and support each other in the manufacturing flow.
We need a multiphysics platform that interoperates with a chip design platform that interoperates with the manufacturing platform, and so forth. Physics, platforms and partnerships are the 3Ps that are important to solve.
As an industry, we must collaborate because it’s going to take a village to solve Multiphysics, which in turn is the key to growth in 3D IC. No individual company can compete on every front.
About John Lee
John Lee is general manager and vice president of the Semiconductor and Optics Business Units at Ansys. Lee co-founded and served as CEO of Gear Design Solutions (now Ansys), developer of the first purpose-built big data platform for integrated circuit design. He cofounded two other startups (Mojave Design and Performance Signal Integrity), which successfully exited into companies now part of Synopsys. He holds undergraduate and graduate degrees from Carnegie Mellon University.