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Zeroing in on EDA Tool Interoperability With Keysight EDA

The Keysight EDA tool suite includes system simulation, schematic entry, circuit simulation and layout, and device modeling.

Griffin Securities’ Jay Vleeschhouwer Offers Wall Street View of EDA Industry

Jay Vleeschhouwer, managing director of Griffin Securities, has followed the EDA industry as a leading financial analyst for 25 years and is a popular speaker at the annual Design Automation Conference. Vleeschhouwer discusses his DAC presentation The State of EDA: A View from Wall Street.

Needham & Company Senior Analyst Charles Shi on EDA Powering Through Semiconductor Industry Cycles

Charles Shi, Principal, Senior Analyst, Needham & Company, LLC., recently offered an upbeat assessment of the electronic design automation (EDA), silicon intellectual property (IP) and services industries, or what SEMI refers to as the electronic system design (ESD) ecosystem.

S2C Paves Way to Digital Innovation with Cutting-Edge Chip Design Verification Solutions

Founded in 2004, S2C’s worldwide customer base uses its desktop and enterprise field programmable gate array (FPGA) prototyping tools to verify system on chip (SoC) and application-specific integrated circuit (ASIC) designs will work as intended.

How Synopsys is Transforming the Chip Development Landscape Via the Cloud

Vikram Bhatia, Director of the Synopsys Cloud Go-to-Market and Product Strategy, discusses leveraging a flexible, pay-per-use approach to fuel the next phase of semiconductor innovation - bring your own cloud (BYOC) and software as a service (SaaS) deployment model.

3D-IC: Great Opportunities, Great Challenges

Electronic designers demand greater integration densities and faster data transfer rates to meet the growing performance requirements of AI/ML, 5G/6G networks and autonomous vehicles as these technologies have outpaced the capabilities of any single chip.

Conquering 2.5D and 3D Chip Design Challenges with Monozukuri

Anna Fontanelli, Monozukuri’s founder and CEO, is an expert in deep-submicron silicon technology and design tools shares her view on the state of Moore’s Law and challenges surrounding 2.5D integration, 3D chip stacking & advanced packaging, as well as the chip design industry’s startup environment.

Cadence at Forefront in Speeding Chip Design with Machine Learning

Machine learning (ML) and artificial intelligence (AI) have ushered in tremendous opportunities for faster growth, problem-solving and technological development in the electronic system design ecosystem. Cadence Design Systems, Inc., a member of the ESD Alliance, a SEMI Technology Community, is at...

Homegrown EDA Tools, Open Source, Starting an EDA Company: Verific on Chip Design Trends

Alameda, Calif.-based Verific Design Automation, a member of the ESD Alliance, made its name in the electronic system design and semiconductor industry supporting companies ranging from startups to billion-dollar industry leaders such as Synopsys, Cadence, Siemens EDA, Xilinx, Microchip, NVidia,...

Chip Design Challenges: Driving the Need for Hardware-Assisted Verification

In the span of a few short months earlier this year, Mentor Graphics became Siemens EDA and introduced a suite of integrated hardware-assisted verification tools, the first product launch under the new Siemens EDA brand. Jean-Marie Brunet, senior director of marketing, product management and...